General Description

ASM1182e, PCI express packet switch, 1 PCIe x1 Gen2 upstream port to 2 PCIe x 1 Gen2 downstream ports, enable users to extend PCIe ports on mother board or embedded system. PCIe interface of ASM1182e is PCIe Base SPEC 2.0 compliance.


  • Standard Compliant
    → PCI express base SPEC 2.0 and backward compatible with SPEC 1.1 & 1.0a
    → PCI Power management SPEC 1.2
  • Port configuration
    → 1 PCIe x1 lane Gen2 upstream port to 2 PCIe x1 lane Gen2 downstream ports
  • PCIe power management
    → Link state L0, L0s, L1, L2/L3 Ready and L3
    → Device state D0, D3 hot
  • Short latency delay
  • Integrate 100MHz PCIe differential clock buffer, no extra clock buffer needed.
  • Support I2C interface for debug usage
  • 7 x 7 QFN48 RoHS package

Package Type

7x7 QFN48

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